1. Field of the Invention
This invention relates to a communication system, more particularly to a MIMO (multiple input multiple output) wireless communication system.
2. Description of the Related Art
The technology of MIMO has been applied to a variety of wireless communication systems recently, including the WLAN (wireless local area network), the WiMAX (Worldwide Interoperability for Microwave Access) and the 4G (4th generation) mobile phone system. These systems have adopted the MIMO to increase transmission speed or channel capacity.
Inevitably, additional antennas and RFE (radio frequency front-end) and AFE (analog front-end) circuits are necessary at the transmitting and receiving ends of the corresponding transmission routes of a MIMO. The hardship of the current application with MIMO is however, to reduce power consumption of the additional components that appears in the corresponding transmission routes.
The general format of each data frame or packet utilized in a wireless system is illustrated in FIG. 1. The format usually includes a preamble sequence used for frame or packet detection, AGC (automatic gain control), carrier synchronization, and timing synchronization. Certain systems even have pilot sequences that are placed within the preamble sequence or in between data sequences for adaptive tracking in channel estimation or equalization, and for timing and frequency tracking.
An additional header sequence is usually required in front of the data sequence in cases when the modulation scheme, coding rate, or number of spatial streams is modified for different demands of channel quality and throughput so that the receiver can demodulate and decode the subsequent data sequences correctly. The header sequence is generally encoded with the modulation scheme and coding rate having the lowest level SNR (signal-to-noise ratio) requirements. Hence, the header sequence will be more immune to poor channel responses.
FIG. 2 depicts the conventional multiple-antenna transmitter in block diagram. As illustrated, a multiple-antenna transmitter 200 includes a TX (transmit) frame controller 210, a sequence selection circuit 212, a MIMO modulation and coding circuit 214, and a number of M TX RFE and AFE circuits 216_1˜216_M. When the transmitter transmits a data frame or packet, the TX frame controller 210 sends the preamble sequence, the header sequence, and data sequence consecutively to the MIMO modulation and coding circuit 214 via the sequence selection circuit 212 during a certain period of time. The MIMO modulation and coding circuit 214 modulates and encodes the sequences according to a specific modulation scheme, coding rate, and number of spatial stream and then transmits the signals of each transmitting route from the M antennas through the TX RFE and AFE circuits 216_1˜216_M, wherein M is an integer greater or equal to 1.
In order to increase transmission speed or channel capacity in different requirements of channel quality and throughput, the data sequences are modulated and encoded according to various modulation schemes, coding rates, or number of spatial streams such that the signals transmitting via the transmission routes need not be the same. Parameters of the data sequences are placed in the contents of the header sequence to inform the receiver about relevant information for demodulation and decoding. The header sequence is modulated and encoded according to the lowest level SNR requirements.
FIG. 3 depicts the conventional multiple-antenna receiver in block diagram. As illustrated, a multiple-antenna receiver 300 includes a RX (receive) frame controller 310, a MIMO demodulation and decoding circuit 312, a sequence separation circuit 314, and a number of N RX RFE and AFE circuits 216_1˜216_N, wherein N is an integer greater or equal to 1. The receiver collects signals from N receiving routes that corresponds to N antennas and N RX RFE and AFE circuits 216_1˜216_N. A preamble sequence received is processed for frame or packet detection to track the arrival of a data frame or packet. Processes including the AGC, carrier synchronization, timing synchronization, and frame synchronization are then handled when the data frame or packet is detected. The timing of the subsequent sequences is generally confirmed after the frame synchronization process. The RX frame controller 310 demodulates and decodes the header sequence during a corresponding time interval and applies MIMO demodulation and decoding using the lowest level SNR requirements. Information extracted from the header sequence during the time interval determines the schemes for further MIMO demodulation and decoding processes applied to subsequent data sequences.
Increased power consumption may be a problem in multiple-antenna systems because of the multiple transmission routes. Nonetheless, the actual power consumption (PRX) should be calculated by averaging the transmit power consumption (PTX), the receive power consumption (PRX), the idle power consumption (PRX—Idle), and the sleep power consumption (PSleep) by weighting them with their respective operating time. The formula of the weighted average is set forth as follows:
      P    Avg    =                              P          TX                ·                  T          TX                    +                        P          RX                ·                  T          RX                    +                        P          RX_Idle                ·                  T                      RX_Idl            ⁢            e                              +                        P          Sleep                ·                  T          Sleep                                    T        TX            +              T        RX            +              T        RX_Idle            +              T        Sleep            
Hence, important issues have been raised on topics regarding efficient ways to cut down transmit power consumption, receive power consumption, idle power consumption, and sleep power consumption when the time interval for each operation is preset.
It should be noted that the idle time of a system is generally much longer than the time intended for transmitting and receiving data. In order to reduce overall power consumption, the typical approach is to lengthen the sleep time, which is relatively less power consuming compared to that during idle time and also to reduce sleep power consumption to a greater extent. However, the time for the system to stay in the sleep mode is still being limited because there is a possibility that packets may be lost during the state of system sleep. There is a conventional approach that reduces average power consumption by allowing only one antenna to transmit and receive during most of the time and turning on the multiple antennas to transmit and receive data when higher transmission rates are required by the system.
As a result, power conservation in multiple-antenna systems has been raised as an important issue yet to be solved.